SiSoC Semiconductor is one of the premier design and verification experts with experience in design and cutting edge verification using the latest methodologies. SiSoC has a highly experienced team in design and verification.
Areas of Expertise
- RTL Design of IP’s, Bridges, Glue Logic
- RTL Integration for Sub-Systems and SOC’s
- Architecting complex test benches using OVM, VMM and UVM
- Test planning and scheduling using coverage driven methods
- Verification from test plan to closure using functional coverage and code coverage
- Scoping and planning out complex projects
- Combining Simulation and static formal verification
- Project management of complete projects
Languages & Methodologies
- System Verilog, Specman, Verilog, VHDL
- SystemC, C, C++
- UVM, OVM, VMM, eRM
- OVL, PSL, System Verilog Assertions
Protocols
- PCI, PCIE, Ethernet, USB 1.1, USB 2.0, OTG, SATA, AMBA, 802.11, OCP, RapidIO, SRIO, DDR, DDR2
- Many other proprietary protocols